Three frequency options (1.0, 0.75 and 0.67 of CPU clock - 0.50 apparently was later added)

Consequently vertical microcode requires smaller instruction lengths and less storage, but requires more time to decode, resulting in a slower CPU clock.

The CPU clock and the bus arbitration network were implemented using 15ns PALs.

Most modern computers have two crystal oscillators, one for the real-time clock and one for the primary CPU clock; truerand exploits this fact.

As with the LC 575, the CPU clock is sometimes wrongly given as 66 MHz.

The IBM system 1130's "cycle steal" is really DMA because the CPU clock is stopped during memory access.

In practice, the effect may be smaller because some CPU instructions use less energy per tick of the CPU clock than others.

Another type of MT is known as simultaneous multithreading, where instructions of multiple threads are executed in parallel within one CPU clock cycle.

Thus initially the Level 2 cache ran at half of the CPU clock speed up to 700 MHz (350 MHz cache).

In addition to the memory clock, I've included the CPU clock at the top for reference.