This allows for multiple instruction streams, which means that more than one instruction can complete during each clock cycle.

Another way of implying an operand value (without giving a store address) is to include the value in the instruction stream.

Again, the data stream has doubled in size, but the instruction stream has not.

The arguments to built-in instructions are encoded immediately after them in the instruction stream.

Another use was to embed frequently used data in the instruction stream using immediate addressing.

The decoder allows the instruction stream to be compact.

It operates in parallel with the main processor, both processors receiving their instructions from a single 32-bit instruction stream.

Stores are not guaranteed to show up in the instruction stream until a program calls an operating system facility to ensure coherency.

What this basically means is that the instruction stream doesn't really change all that fast, but the data stream changes constantly.

The instruction stream, however, is all over the map.